Floorplanning Constraints for Dynamic Function eXchange - 2021.2 English

UltraFast Design Methodology Guide for Xilinx FPGAs and SoCs

Document ID
UG949
Release Date
2021-11-19
Version
2021.2 English

Optimal floorplanning is one of the most critical aspects in DFX designs to ensure timing closure and avoid routability issues. This section provides best practices for achieving the maximum solution space for the router and quicker timing closure. For more information on DFX, see the Vivado Design Suite User Guide: Dynamic Function eXchange (UG909).