Impact on Implementation - 2021.2 English

UltraFast Design Methodology Guide for Xilinx FPGAs and SoCs

Document ID
UG949
Release Date
2021-11-19
Version
2021.2 English

The set_max_delay constraint replaces the setup path requirement and influences the entire implementation flow. The set_min_delay constraint replaces the hold path requirement and only affects the router behavior whenever it introduces the need to fix hold.