Optimize Hierarchy for Advanced Design Techniques - 2021.2 English

UltraFast Design Methodology Guide for Xilinx FPGAs and SoCs

Document ID
UG949
Release Date
2021-11-19
Version
2021.2 English

Advanced design techniques such as bottom-up synthesis, Dynamic Function eXchange (DFX), and out-of-context design require planning at the hierarchical level. The designer must choose the appropriate level of hierarchy for the technique being used. These techniques are not covered in this document. For more information, see this link in the Vivado Design Suite User Guide: Hierarchical Design (UG905).