Reduce the Number of Unique Control Sets - 2021.2 English

UltraFast Design Methodology Guide for Xilinx FPGAs and SoCs

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2021.2 English

CLB packing restrictions caused by unique control sets can introduce sub-optimal placement and higher net delay. On a Pblock that already has a CONTAIN_ROUTING requirement, the additional restriction of unique control sets puts more constraints on the router, which might lead to an unroutable situation. Therefore, it is very important to reduce the unique control sets on static logic that is assigned to a Pblock, especially if the Pblock has CONTAIN_ROUTING enabled.