Report CDC - 2021.2 English

UltraFast Design Methodology Guide for Xilinx FPGAs and SoCs

Document ID
UG949
Release Date
2021-11-19
Version
2021.2 English

The Report CDC (report_cdc) command performs a structural analysis of the clock domain crossings in your design. You can use this information to identify potentially unsafe CDCs that might cause metastability or data coherency issues. Report CDC is similar to the Clock Interaction report, but Report CDC focuses on structures and related timing constraints. Report CDC does not provide timing information because timing slack does not make sense on paths that cross asynchronous clock domains.

Report CDC identifies the most common CDC topologies as follows:

  • Single bit synchronizers
  • Multi-bit synchronizers for buses
  • Asynchronous reset synchronizers
  • MUX and CE controlled circuitry
  • Combinatorial logic before synchronizer
  • Multi-clock fanin to synchronizer
  • Fanout to destination clock domain

For more information on the report_cdc command, see this link in the Vivado Design Suite User Guide: Design Analysis and Closure Techniques (UG906). Also, see report_cdc in the Vivado Design Suite Tcl Command Reference Guide (UG835).

Specific constraints should be applied to prevent default timing analysis on asynchronous clock domain crossings.