Simple Design - 2021.2 English

UltraFast Design Methodology Guide for Xilinx FPGAs and SoCs

Document ID
UG949
Release Date
2021-11-19
Version
2021.2 English

For a simple design with a small team of designers:

  • 1 file for all constraints
  • 1 file for physical + 1 file for timing
  • 1 file for physical + 1 file for timing (synthesis) + 1 file for timing (implementation)