Taking Advantage of Rapid Validation - 2021.2 English

UltraFast Design Methodology Guide for Xilinx FPGAs and SoCs

Document ID
UG949
Release Date
2021-11-19
Version
2021.2 English

This guide also introduces the concept of rapid validation of specific aspects of the system architecture and micro-architecture as follows:

  • In the context of system design, the I/O bandwidth is validated in-system, before implementing the entire design. Validating I/O bandwidth can highlight the need to revise system architecture and interface choices before finalizing on I/Os.
  • As part of design implementation, baselining is used to write the simplest set of constraints, which can identify internal device timing challenges. Baselining is a process used to identify the need to revise RTL micro-architecture choices before moving to the implementation phase.