Conclusion - 2021.2 English

Vivado Design Suite Tutorial: Designing IP Subsystems Using IP Integrator (UG995)

Document ID
UG995
Release Date
2021-11-16
Version
2021.2 English

This tutorial walked you through creating a simple IP Integrator subsystem design by instantiating common peripherals and local memory cores and connecting them through an AXI Interconnect. You then took the completed subsystem design into a top-level HDL design for implementation in the Vivado Design Suite. This tutorial gave you hands-on experience and a basic understanding of many of the features of the Vivado IP Integrator.