Step 7: Using the Address Editor - 2021.2 English

Vivado Design Suite Tutorial: Designing IP Subsystems Using IP Integrator (UG995)

Document ID
UG995
Release Date
2021-11-16
Version
2021.2 English

For various memory mapped master and slave interfaces, IP Integrator follows the industry standard IP-XACT data format for capturing memory requirements and capabilities of endpoint masters and slaves. This section provides an overview of how IP Integrator models address information on a memory-mapped slave.

Master interfaces have address spaces, or address_space objects. Slave interfaces have an address_space container called a memory map to map the slave to the address space of the associated master. Typically, these memory maps are named after the slave interface pins, for example S_AXI, though that is not required.

The memory map for each slave interface pin contains address segments, or address_segment objects. These address segments correspond to the address decode window for that slave. A typical AXI4-Lite slave will have only one address segment, representing a range of addresses. However, some slaves, like a bridge, will have multiple address segments or a range of addresses for each address decode window.

When you map a slave to the master address space, a master address_segment object is created, mapping the address segments of the slave to the master. The Vivado IP Integrator can automatically assign addresses for all slaves in the design. However, you can also manually assign the addresses using the Address Editor. In the Address Editor, you see the address segments of the slaves, and can map them to address spaces in the masters.

Tip: The Address Editor tab only appears if the subsystem design contains an IP block that functions as a bus master. In the tutorial design, the external processor connecting through the AXI Interconnect is the bus master.
  1. Click the Address Editor tab to show the memory map of all the slaves in the design.
    Note: If the Address Editor tab is not visible then select Window > Address Editor from the main menu.
  2. Right-click anywhere in the Address Editor and select Assign All.

    This command maps slave address segments to master address spaces, thereby creating address segments in the master. You can change these automatic addresses later by clicking in the corresponding column and changing the values.

    Alternatively, you can also click on the Assign All button on the Address Editor toolbar to automatically assign the addresses.

    The Auto Assign Address dialog box is displayed.

  3. Click OK.

    The Address Editor should now look like the following figure:

  4. Change the size of the address segments for the AXI BRAM Controller core.

    Click the Range column, and select 64K from the drop-down menu, shown in the following figure:

  5. Select the Diagram tab, to return to the IP Integrator design canvas.