#Define Xil_L1DCacheInvalidateRange - 2022.1 English

Xilinx Standalone Library Documentation: BSP and Libraries Document Collection (UG643)
Document ID
UG643
Release Date
2022-04-21
Version
2022.1 English

Description

Invalidate the L1 data cache for the given address range.

If the bytes specified by the address (Addr) are cached by the L1 data cache, the cacheline containing that byte is invalidated.If the cacheline is modified (dirty), the modified contents are lost.

Note: Processor must be in real mode.

Parameters

The following table lists the Xil_L1DCacheInvalidateRange function arguments.

Table 1. Xil_L1DCacheInvalidateRange Arguments
Name Description
Addr is address of range to be invalidated.
Len is the length in bytes to be invalidated.