Design Summary - 2022.1 English

Xilinx Standalone Library Documentation: BSP and Libraries Document Collection (UG643)

Document ID
UG643
Release Date
2022-04-21
Version
2022.1 English

The following figure shows the flow diagram of how an user application interacts with XilFPGA interacts and other SW components for loading the bitstream from DDR to the PL region.

Figure 1. XilFPGA Design Summary