SLL signals are the only data connections between SLR components.
The following do not propagate across SLR components:
- Carry chains
- DSP cascades
- Block RAM and UltraRAM cascades
The tools normally take this limit on propagation into account. To ensure that designs route properly and meet your design goals, you must also take this limit into account when you build very long cascades and manually place such logic near SLR boundaries.