Using Vivado Design Suite HDL Templates - 2022.1 English

Versal ACAP Hardware, IP, and Platform Development Methodology Guide (UG1387)

Document ID
UG1387
Release Date
2022-05-25
Version
2022.1 English

Use the Vivado Design Suite Language Templates when creating RTL or instantiating Xilinx® primitives. The Language Templates include recommended coding constructs for proper inference to the Xilinx device architecture. Using the Language Templates can ease the design process and lead to improved results. To open the Language Templates from the Vivado IDE, select the Language Templates option in the Flow Navigator, and select the desired template.