FIFO Accesses - 2022.1 English

Vitis High-Level Synthesis User Guide (UG1399)

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2022.1 English

A special case of arrays accesses are when arrays are implemented as FIFOs (also called "streamed" arrays). This is often the case when dataflow optimization is used.

Accesses to an array that is implemented as a FIFO (see set_directive_stream) must strictly be in the same order for writing and reading, and Vitis HLS must be able to analyze this. A typical case that is easy to analyze when elements are written for 0 to N-1, and read in the same order. It is often the case that arrays with multiple readers cannot be implemented as FIFOs without additional code to replicate the array, so that it is implemented by as many FIFOs as there are readers.