The Versal ACAP XPE dynamically generates the required decoupling capacitors required for your design. Using the Power Design tab in the XPE, you can see the exact decoupling requirements based on their estimation. Place these decoupling capacitors as described in the XPE or in the Versal ACAP PCB Design User Guide (UG863).
Xilinx provides S-parameter models to validate your printed circuit board (PCB) design and to adjust decoupling requirements while ensuring that the power distribution network (PDN) is suitable for your design. To request these models, go to this page on the Xilinx website.