You can debug AI Engine graphs and kernels using various methods. Typically, in the early stages of graph and kernel debug, you ensure the graph and kernels are functionally accurate. Xilinx offers a variety of simulation flows to help ensure the functional accuracy and highly recommends running these simulations early in the design flow.
Events are an important feature of AI Engine debug and performance analysis. Events are similar to triggers. An event signal is high in the cycle for when the condition associated with that event is true. Examples of events include Conflict DM bank 0, Lock 11 Released, Floating point Overflow, and PC event 0. Each event has a unique 7-bit number, and there are up to 128 events in each AI Engine. The event trace feature allows you to capture these events associated with the AI Engine, memory modules, and interface modules in hardware.
- Run the event trace build flow.
- Run the design in hardware and capture trace data at runtime.
- View and analyze the trace data.
Every AI Engine in the AI Engine array has a debug interface, which can be used to read/write to all the individual AI Engine registers. Requests for reading and writing AI Engine registers are sent via the AXI4 memory-mapped (AXI4-MM) interface and are then forwarded to the AI Engine Debug Interface. All of the registers in the AI Engine are mapped on the AXI4-MM. The AXI4-MM interface has a 32-bit read/write bus. You can specify any AXI4-MM mapped address to read over the AXI4-MM interface. Any external AXI4-MM master (e.g., PS) can issue a stall signal to a specific AI Engine by writing into the control/status register. There are independent registers for system control (e.g., normal program flow) and the debugger. The Vitis™ System Debugger provides a comprehensive source code debugger that helps debug AI Engine graphs and kernels. For more information on debugging the AI Engine application, see this link in the Versal ACAP AI Engine Programming Environment User Guide (UG1076).