System Design Types for Versal Devices without AI Engines - 2022.1 English

Versal ACAP System and Solution Planning Methodology Guide (UG1504)

Document ID
UG1504
Release Date
2022-05-25
Version
2022.1 English

Versal devices without AI Engines comprise traditional programmable logic fabric, memory (block RAM and UltraRAM), the network on chip (NoC), hardened DDRMC, a processing subsystem, and multiple hardened IP, such as PL PCIe® , CPM, multirate Ethernet MAC (MRMAC), 600G channelized multirate Ethernet subsystem (DCMAC), and High-Speed Crypto Engine (HSC).

For more information, see the following product selection guides: