Creating an HDL Wrapper - 2022.1 English

MicroBlaze Processor Embedded Design User Guide (UG1579)
Document ID
UG1579
Release Date
2022-06-01
Version
2022.1 English

You can integrate an IP integrator block design into a higher-level design by instantiating the design in a higher-level HDL file.

To instantiate at a higher level, in the Design Sources hierarchy of the Block Design panel, right-click the design and select Create HDL Wrapper, as shown in the following figure.

Figure 1. Creating an HDL Wrapper

See section Integrating the Block Design into a Top-Level Design in Vivado Design Suite User Guide: Designing IP Subsystems using IP Integrator (UG994) for more information on generating output products.

Vivado offers two choices for creating an HDL wrapper, as shown in the following figure:

  • You can let Vivado create and automatically update the wrapper, which is the default option.
  • Create a user-modifiable script, which you can edit and maintain. Choosing this option requires that you update the wrapper every time you make port-level changes in the block design.
Figure 2. Create HDL Wrapper Dialog Box

This generates a top-level HDL file for the IP integrator subsystem. You can now take your design through the other design flows: elaboration, synthesis, and implementation.