As an alternative to dragging and dropping the DDR SDRAM component from the Board tab, you could use the Block Automation feature of IP integrator to configure the Memory IP and tie its
SYS_CLK and DDR3 interfaces to the board interfaces.
- Because the Memory IP core provides the clocking for the entire KC705 board, you
should Run Block Automation, shown in the
following figure, for the Memory IP core prior to adding a clock controller.
This opens the Run Block Automation dialog box as shown in the following figure.
The Run Block Automation dialog box shows the available IP. In this case, the block design only has the Memory IP you previously added.
- Ensure the Memory IP is selected, and click OK.
SYS_CLKand DDR interfaces of the Memory IP are connected to the DDR memory components on the platform board. The Memory IP core is configured for 400 MHz operation with the correct pins selected to interface to the KC705 board. The following figure shows the Memory IP core after running Block Automation.