The Power Comparison Snapshots sheet allows you to capture a series of snapshots of the power status of your design under varying conditions or at different points in its design cycle. Each snapshot displays device part, environmental information, the power consumed by your design, and the voltage and current across each of the power supply sources used in the design. You can use the Power Comparison Snapshots sheet to compare the power consumed under different conditions and the power calculated at different points in the design cycle.
A snapshot can represent:
- Power information for this XPE spreadsheet, captured at a certain time. When you create the snapshot, all of this information is copied from the Summary sheet of this spreadsheet to the Power Comparison Snapshots sheet.
- Power information for a different XPE spreadsheet, captured at a certain time. When you create the snapshot, all of this information is copied from the Summary sheet of the other spreadsheet to this Power Comparison Snapshots sheet.
- Power information for a design implemented in the ISE tools, captured at a certain time. When you create the snapshot, the power information is imported from the ISE Power Report into the Power Comparison Snapshots sheet.
The Power Comparison Snapshots sheet allows you to explore What If? scenarios, changing the part or the environmental conditions under which the part will operate and observing the effect on power the changes will have. You can also create a snapshot of the power calculated when your design is implemented in the ISE tools, to see how the power calculated for the implemented design compares to the power calculated before the design was implemented.
Using snapshots, you can explore What If? scenarios such as:
- How will power consumption change if I implement a design in different Xilinx architectures? What is the difference in power consumption when the same design is implemented in a Kintex device versus an Artix device?
- How does the power consumption of a design vary as a function of junction temperature?
- How does the power consumption of a GT Power change as a function of device type?
- How much power could be saved by using power optimization, or by choosing a -2L (low power) or a 0.9V part?
- How does the power and temperature vary under nominal versus maximum operating conditions?
- How does the power consumption of a design vary as the design undergoes revision with respect to power, features, and performance?
- How does the power consumption vary between the Xilinx Power Estimator (XPE), XPower Analyzer (XPA), and Vivado Report Power estimations?
- How does the power consumption vary with changing clock frequencies?
- How did my pre-design estimate compare with post-design results and imported design data?
The four sections in the Power Comparison Snapshots sheet are:
- Displays the following:
- The name of the snapshot (top line in the table).
- Source and version of the snapshot data creator (for example, “ISE: 13.4” for an imported snapshot).
- Data and Time the snapshot was created.
- The file name of XPE or the imported source.
- The Part (device, package, and speed grade) for which the power values were calculated.
- The value for Ambient Temperature under which the device will operate, as specified when the snapshot was taken.
- The Process (Typical or Maximum) specified when the snapshot was taken. The Process setting accounts for the power dissipation caused by the manufacturing process.
- The Implementation (Default or Power Optimization) specified when the snapshot was taken. This setting focuses the synthesis and implementation tools in the ISE Design Suite or the Vivado Design Suite on minimizing power towards different objectives when the design is implemented.
- Displays the following:
- Total On-Chip Power - The total power consumed within the device for each snapshot. It includes device static and design dependent static and dynamic power.
- The values for Junction Temperature and Effective ΘJA under which the device will operate, as specified when the snapshot was taken.
- On-Chip Power
- The On-Chip Power section presents the
total power consumed within the device by each resource type.
In some cases, more than one resource will be included in a single row. For example, the Clocking row might include the power associated with clock nets as well as the power associated with clock managers such as the PLL and the MMCM, and the Transceiver row might include the power associated with Multi-Gigabit Transceivers (MGTs) as well as the power associated with a Hard IP block.
- Supply Summary
- Displays the voltage and estimated current across the different supply sources. The table includes all power required by the internal logic along with power eventually sourced and consumed outside the Xilinx device, such as in external board terminations. This view includes both static and dynamic power.