create_drc_ruledeck - 2022.1 English

Vivado Design Suite Tcl Command Reference Guide (UG835)

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2022.1 English

Create one or more user defined DRC rule deck objects


create_drc_ruledeck [‑quiet] [‑verbose] <ruledecks>...




Name Description
[-quiet] Ignore command errors
[-verbose] Suspend message limits during command execution
<ruledecks> Names of DRC rule decks to create


DRC, Object


Create one or more user-defined rule decks for use when running report_drc.

A drc_ruledeck object is a collection of design rule checks, grouped for convenience, to be run at different stages of the FPGA design flow, such as during I/O planning or placement. The tool comes with a set of factory predefined rule decks. Use the get_drc_ruledecks command to return a list of the currently defined rule decks.

The rule decks created by this command are empty, without any checks. You must add design rule checks to the rule deck using the add_drc_checks command. Checks can be removed from a rule deck using the remove_drc_checks command. To see a list of design rule checks that are available to include in the ruledeck, use the get_drc_checks command.

This command returns the list of drc_ruledecks created.


-quiet - (Optional) Execute the command quietly, returning no messages from the command. The command also returns TCL_OK regardless of any errors encountered during execution.
Note: Any errors encountered on the command-line, while launching the command, will be returned. Only errors occurring inside the command will be trapped.
-verbose - (Optional) Temporarily override any message limits and return all messages from this command.
Note: Message limits can be defined with the set_msg_config command.

<ruledecks> - (Required) Specify the name of one or more user-defined DRC rule decks to create.


The following example creates two new drc_ruledeck objects:
create_drc_ruledeck my_rules project_rules