create_hw_axi_txn - 2022.1 English

Vivado Design Suite Tcl Command Reference Guide (UG835)

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2022.1 English

Create hardware AXI transaction object


create_hw_axi_txn [‑address <arg>] [‑data <arg>] [‑size <arg>] ‑type <arg>
    [‑len <arg>] [‑burst <arg>] [‑cache <arg>] [‑id <arg>] [‑force]
    [‑quiet] [‑verbose] <name> <hw_axi>


New hardware AXI transaction object.


Name Description
[-address] AXI read or write address. Default: Address zero
[-data] Transaction data. Default: All zeroes
[-size] Deprecated. Data word size in bits. This is now automatically set based on the IP core properties.
-type READ or WRITE transaction.
[-len] Length of the transaction in data words. Default: 1
[-burst] Burst type: INCR,FIXED or WRAP. Default: INCR
[-cache] AXI cache type. Default: 3
[-id] Address ID. Default: 0
[-force] Overwrite an existing transaction with the specified name if it exists, otherwise create a new transaction. Default: 0
[-quiet] Ignore command errors
[-verbose] Suspend message limits during command execution
<name> Name of new object.
<hw_axi> Associated hardware AXI core object.




Define a read or write transaction for the JTAG to AXI Master core, hw_axi object, specified by the get_hw_axis command.

The JTAG to AXI Master is a customizable IP core that works as an AXI Master to drive AXI transactions and drive AXI signals that are internal to the hardware device. The JTAG-AXI core supports all memory-mapped AXI interfaces, except AXI4-Stream, and supports the AXI-Lite protocol. Detailed documentation on the IP core can be found in the LogiCORE IP JTAG to AXI Master Product Guide (PG174).

AXI transactions are read/write burst transactions from the JTAG to AXI Master core onto AXI signals connected to the core. The AXI transaction lets you configure aspects of the read or write transaction such as the data to send and the address to send it to. These defined transactions are stored as properties of the specified hw_axi object, waiting to be run and reported using the run_hw_axi and report_hw_axi_txn commands.

The command returns the name of the hw_axi_txn object created, or returns an error if it fails.


-address <arg> - (Optional) Specify the address of the register on the hw_axi object to read from, or write into. Default address 0000.

-data <arg> - (Optional) The data value specified in hexadecimal format to write into the address location of the hw_axi for WRITE transactions. The default data value is all zeros.

-type [ READ | WRITE ] - (Required) Specify the AXI transaction to READ from the specified address, or WRITE into it.

-len <arg> - (Optional) The length of the READ or WRITE transaction, specified as the number of data words to read or write, based on the -size option. The default is 1.

-burst <arg> - (Optional) The type of AXI bursts to perform. Bursts can be specified as INCR, FIXED, or WRAP. The default data burst is incremental (INCR).

-cache <arg> - (Optional) The AXI command cache to implement, specified in decimal form. The default value is 3. For more information on read/write cache settings refer to the LogiCORE IP Product Guide: JTAG to AXI Master (PG174).

-id <arg> - (Optional) The ID to assign to the AXI transaction, specified in decimal form. This lets the tool identify responses to various read and write transactions.

-quiet - (Optional) Execute the command quietly, returning no messages from the command. The command also returns TCL_OK regardless of any errors encountered during execution.
Note: Any errors encountered on the command-line, while launching the command, will be returned. Only errors occurring inside the command will be trapped.
-verbose - (Optional) Temporarily override any message limits and return all messages from this command.
Note: Message limits can be defined with the set_msg_config command.

<name> - (Required) The name to give to the newly created AXI transaction object. This name can be used to access or recall the transaction.

<hw_axi> - (Required) The hw_axi object to define the transaction for. The hw_axi must be specified as an object returned by the get_hw_axi command, and can not simply be specified by name.


The following example specifies a WRITE transaction, with a data value of decimal 10 specified as a hexadecimal value, to be written in a 2 data word transaction for 32-bit data words:
create_hw_txn write_1 -type WRITE -data 0000_0000_0000_000A -size 32 -len 2 \
[get_hw_axis hw_axi_1]
The following example creates a new hardware AXI transaction object, hw_axi_txn, which writes the specified 128 bit data stream into the specified address of the hw_axi object. The new AXI transaction is named write_txn:
create_hw_axi_txn write_txn [get_hw_axis hw_axi_1] -type WRITE \
-len 4 -data {44444444_33333333_22222222_11111111}
This example creates AXI read and write transactions, runs the hw_axi, and reports on the results:
create_hw_axi_txn wr_txn [lindex [get_hw_axis] 0] -address 80000000 \
-data {11112222 33334444 55556666 77778888} -len 4 -type write
create_hw_axi_txn rd_txn [lindex [get_hw_axis] 0] -address 80000000 \
-len 4 -type read
run_hw_axi [get_hw_axi_txns wr_txn]
set wr_report [report_hw_axi_txn wr_txn -w 32]
puts $wr_report
run_hw_axi [get_hw_axi_txns rd_txn]
set rd_report [report_hw_axi_txn rd_txn -w 32]
puts $rd_report
This example creates a sequence of READ type hw_axi transactions, and then runs them:
# Read registers
create_hw_axi_txn -address [format %08x [expr $baseaddr + \
   $MM2S_VDMACR_OFFSET]] -type read txn00 [get_hw_axis hw_axi_1]
create_hw_axi_txn -address [format %08x [expr $baseaddr + \
   $MM2S_VDMASR_OFFSET]] -type read txn01 [get_hw_axis hw_axi_1]
create_hw_axi_txn -address [format %08x [expr $baseaddr + \
   $MM2S_REG_INDEX_OFFSET]] -type read txn02 [get_hw_axis hw_axi_1]
create_hw_axi_txn -address [format %08x [expr $baseaddr + \
   $PARK_PTR_REG_OFFSET]] -type read txn03 [get_hw_axis hw_axi_1]
create_hw_axi_txn -address [format %08x [expr $baseaddr + \
   $VERSION_OFFSET]] -type read txn04 [get_hw_axis hw_axi_1]
create_hw_axi_txn -address [format %08x [expr $baseaddr + \
   $S2MM_VDMACR_OFFSET]] -type read txn05 [get_hw_axis hw_axi_1]
create_hw_axi_txn -address [format %08x [expr $baseaddr + \
   $S2MM_VDMASR_OFFSET]] -type read txn06 [get_hw_axis hw_axi_1]
create_hw_axi_txn -address [format %08x [expr $baseaddr + \
   $S2MM_VDMA_IRQ_OFFSET]] -type read txn07 [get_hw_axis hw_axi_1]
run_hw_axi -quiet [get_hw_axi_txns]