Vivado Design Flows Overview - 2022.1 English

Vivado Design Suite Tutorial: Design Flows Overview (UG888)

Document ID
UG888
Release Date
2022-05-05
Version
2022.1 English
Important: This tutorial requires the use of the Kintex®-7 family of devices. You will need to update your Vivado® tools installation if you do not have this device family installed. Refer to the Vivado Design Suite User Guide: Release Notes, Installation, and Licensing (UG973) for more information on Adding Design Tools or Devices.

This tutorial introduces the use models and design flows recommended for use with the Xilinx® Vivado® Integrated Design Environment (IDE). This tutorial describes the basic steps involved in taking a small example design from RTL to bitstream, using two different design flows as explained below. Both flows can take advantage of the Vivado IDE, or be run through batch Tcl scripts. The Vivado Tcl API provides considerable flexibility and power to help set up and run your designs, as well as perform analysis and debug.

Video: You can also learn more about the Vivado Design Suite design flows by viewing the quick take video at Vivado Design Flows and the Vivado Getting Started with the Vivado IDE quick take video.
Training: Xilinx provides training courses that can help you learn more about the concepts presented in this document. Use these links to explore related courses: