Sources Window Popup Menu Commands for Block Design Sources - 2022.1 English

Vivado Design Suite User Guide: Using the Vivado IDE (UG893)

Document ID
UG893
Release Date
2022-04-27
Version
2022.1 English

The following commands are available in the popup menu when a block design (BD) module is selected in the Sources window.

Note: For more information, see the Vivado Design Suite User Guide: Designing IP Subsystems Using IP Integrator (UG994).
Create HDL Wrapper
Creates a top-level Verilog or VHDL module that contains the selected block design.
View Instantiation Template
Opens the instantiation template for the block design to instantiate it into another RTL file.
Generate Output Products
Generates target data for the block design as needed.
Reset Output Products
Removes the currently generated target data.