The list of files used in the Vivado Design Suite platform board flow include the following:
- Board file
- The board file is the file described in this appendix, and must
be named board.xml. The board file lists the
components used on a system-level board, including the Xilinx device and does the following:
- Lists the components used on a system-level
- Defines the different operating modes supported by those components
- Lists the signal interfaces implemented by those components
- Lists the preferred IP to implement those interfaces in a design project
- Maps the logical ports of the interface definition to the physical ports and component pins of the Xilinx device
Xilinx standard board definitions can be found at the following location in the Vivado Design Suite software installation:
Where <install_dir> is the directory the Vivado Design Suite was installed into, and <version> is the software version.
You can create user-defined Board files by using the Xilinx standard board definition files as a starting point for customization. User-defined or third-party Board files, and associated files, can be added to a board repository for use by the Vivado Design Suite by setting the following parameter when launching the Vivado tool:
set_param board.repoPaths [list "<path1>" “<path2>” “...”]
Where <path> is the path to a directory containing a single Board file and files referenced by the board.xml file, such as part0_pins.xml and preset.xml. The <path> can also specify a directory with multiple subdirectories, each containing a separate Board file. For example:
set_param board.repoPaths [list "C:/Data/usrBrds" "C:/Data/othrBrds"]
- Pins file
- Maps the component pin name on the Xilinx device, as found in the <port_map> of the Board file, to a physical pin location on the device package. This facilitates I/O assignment of signals coming into the Xilinx device to pins on the packaged part. This file is located in the board repository, in the same folder or directory as the Board file.
- Preset file
- Provides a list of predefined IP configuration options for the different IP used to implement bus interfaces in a design project. The preset file is used by the Vivado Design Suite when the IP is customized from the IP catalog and added into the design. This file is located in the board repository, in the same folder or directory as the Board file.
- Interface file
- Defines the logical ports and attributes of the signals that
make up the interface file. A bus interface is a grouping of signals that share
a common function. Interface definitions provide the capability to group
functional signals to quickly define connections between IP in a Vivado Design Suite IP integrator block diagram.
For more information refer to this link in the
Vivado Design Suite User Guide: Designing
IP Subsystems Using IP Integrator (UG994).
Xilinx standard interface definitions can be found at the following location in the Vivado Design Suite software installation:
- IP file
- The IP definition is stored in an XML file based on the IP-XACT standard,
component.xml, which includes a list of
logical ports and bus interfaces found on the IP core, that can be connected to
the interfaces implemented by the system-level board.
Xilinx IP definitions can be found in the Vivado Design Suite software installation: