Using XPMs - 2022.1 English

Vivado Design Suite User Guide: System-Level Design Entry (UG895)

Document ID
UG895
Release Date
2022-05-11
Version
2022.1 English

You can use any XPM language templates in your design. The parameters available for a specific XPM are explained in the instantiation template displayed in the Language Templates window.

Select and copy the contents of the instantiation template and paste it into your own source file, or use the Insert Template command from the popup menu in the Text Editor. You do not need to copy the comments for the instantiation template into your design source file.

You can change the instance name and wire ports as needed to fit the XPM instance into your design, and modify parameters/generics according to the documentation provided as comments in the language template.

Important: Be sure to read and comply with all code comments in the XPM language template to properly use the XPM.

The following figure shows an example of an XPM_CDC instance.

Figure 1. XPM_CDC Example

Some XPMs deliver constraints that are defined in Tcl files located in the ./data/ip/xpm/<xpm>/tcl folder of a specific XPM. The constraints are applied during synthesis and appear in the synthesis log file along with other constraints that are processed. The constraints can have dependencies on a clock object present on the net that connects to the XPM. This is because some XPMs query the period property of the clock for setting a constraint. If the clock object is not present, a critical warning is generated.

Important: When using the report_compile_order command, the Tcl constraint files for the XPMs in the design are not shown unless you have opened the elaborated, synthesized, or implemented design.

For details on the various XPMs and their parameterization options, see this link in the UltraScale Architecture Libraries Guide (UG974), or the Vivado Design Suite 7 Series FPGA and Zynq-7000 SoC Libraries Guide (UG953).