When generating the output products for an IP, the default behavior is to produce an OOC synthesized design checkpoint (DCP). Alternatively, you can choose to synthesize the IP along with the top-level user logic, which is called global synthesis.
In either flow, Vivado IDE generates HDL and XDC files for the IP and uses those files during synthesis and during implementation, as shown in the following figure.
Figure 1. Out-Of-Context (OOC) and Global Synthesis Flow