Questa Advanced Simulator Simulation Options - 2022.1 English

Vivado Design Suite User Guide: Logic Simulation (UG900)

Document ID
UG900
Release Date
2022-04-21
Version
2022.1 English
Table 1. Questa Advanced Simulator Simulation Options
Option Description
questasim.simulate.runtime Specify simulation run time
questasim.simulate.tcl.post TCL file containing set of commands that you want to invoke at end of simulation.
questasim.simulate.log_all_signals Log all signals
questasim.simulate.custom_do Specify the name of custom do file
questasim.simulate.custom_udo Specify the name of custom user do file
questa.simulate.ieee_warning Suppresses IEEE warnings
questasim.simulate.sdf_delay Specify the delay type for sdf annotation
questasim.simulate.saif Specify SAIF file
questasim.simulate.saif_scope Specify design hierarchy instance name for which power estimation is desired
questasim.simulate.vsim.more_option More VSIM simulation options
questa.simulate.custom_wave_do Name of the custom wave.do file which is used in place of a regular Vivado generated wave.do file