Unpacked Struct - 2022.1 English

Vivado Design Suite User Guide: Logic Simulation (UG900)

Document ID
UG900
Release Date
2022-04-21
Version
2022.1 English

An equivalent unpacked type is created on the C side, in which all the members are converted to the equivalent C representation.

Examples

SystemVerilog type
typedef struct {
        int i;
        bit b;
        reg r[3:0];
        logic [2:0] l[4:8][9:1];
    } sType;
C type
typedef struct {
    int i;
    svBit b;
    svLogic r[4];
    svLogicVecVal l[5][9][SV_PACKED_DATA_NELEMS(3)];
} sType;