Vivado Simulator VHDL Data Format - 2022.1 English

Vivado Design Suite User Guide: Logic Simulation (UG900)

Document ID
UG900
Release Date
2022-04-21
Version
2022.1 English

This section describes how to convert between VHDL values and the format of the memory buffers to use with the XSI functions xsi_get_value and xsi_put_value.