Example with Custom Attribute on Hierarchy (VHDL) - 2022.1 English

Vivado Design Suite User Guide: Synthesis (UG901)

Document ID
UG901
Release Date
2022-06-06
Version
2022.1 English

attribute my_att : string;

attribute my_att of beh : architecture is "my_value"

attribute DONT_TOUCH : string;

attribute DONT_TOUCH of beh : architecture is "yes";

Care should be taken when using custom attributes on signals as well. When a custom attribute is seen on a signal, the synthesis tool attempts to put that attribute on the item; however, this item could be translated to a register or a net depending on how the tool evaluates the RTL code. Also, as with hierarchies, just because a signal has a custom attribute, the tool can perform optimizations on that signal, and the attribute will be lost. To retain custom attribute on signals with custom attributes you must place the DONT_TOUCH or the KEEP attribute on those signals.

Finally, because a signal in RTL could describe both a register and the net coming out of the register, the synthesis tool checks any items with both custom attributes and the DONT_TOUCH attribute. If the net in question is driven by a register, synthesis copies that custom attribute to the register and the net, because there are multiple ways of using custom attributes, and sometimes the attribute is wanted on the register and sometimes the net.