Absorbed Registers and Nets - 2022.1 English

Vivado Design Suite User Guide: Using Constraints (UG903)

Document ID
UG903
Release Date
2022-06-01
Version
2022.1 English

Some registers or nets in the RTL sources can disappear in the elaborated design (or synthesized design) for various reasons. For example, memory block, DSP or shift register inference requires absorbing several design objects into one resource. Instead of using these objects to define constraints, try to find other connected registers or nets that you can use.