Let’s assume that the setup path multiplier is set to five (5). Because the hold path multiplier is not specified, the hold relationship is derived from the setup launch and capture edges:
set_multicycle_path 5 -setup -from [get_pins data0_reg/C] -to [get_pins data1_reg/D]
By default, the setup multiplier is applied against the capture clock. This results in moving the edge on the capture clock forward. The setup capture edge comes after five clock periods instead of just one. Because no hold multiplier has been specified, the edge of the capture clock used for the hold check stays the edge that arrives one cycle before the active edge used for the setup check.
The edges on the launch clock do not change for the setup and hold relationships.
With a four-cycle hold requirement, the timing-driven implementation tools usually have to insert a large amount of delay in the datapath in order to meet hold timing in both Slow and Fast timing corners. This results in unnecessary area and power consumption. For this reason, it is important to relax the hold requirement when possible.
In this example design, the clock enable signal provides the safety to not
have to hold the data in the
data0_reg for four
cycles without risking metastability. Example Two: Setup=5 / Hold=4 describes
how the hold requirement can be relaxed.