Since there are several times mores pins than cells in the design, using
get_pins instead of get_cells can have a
significant impact on the runtime. The runtime degradation can be experienced when
processing XDC constraints (for example, open_checkpoint runtime) or when executing a
Tcl script. Xilinx recommends leveraging the relationship between pin and cell objects
to improve the runtime for large number of pin queries.
Instead of finding a list of pins based on their names among all pins in the design, it is more efficient to first find the cells of the desired pins, and then refine the query by filtering the desired pins of the cells returned by the first query, as described below.
Recommended Pin Queries
- Original pin
query:
get_pins –hier * -filter {NAME=~xx*/yy*} - Recommended efficient pin
query:
get_pins –filter {REF_PIN_NAME=~yy*} –of [get_cells –hier xx*] - Alternate recommended pin
query:
get_pins –filter {REF_PIN_NAME=~yy*} –of [get_cells –hier * -filter {NAME=~xx*}]
Example
For example, consider the following constraint:
set_max_delay 15 -from [get_pins -hier -filter {NAME=~*/aclk_dpram_reg*/*/CLK}] \
-to [get_cells -hier -filter {NAME=~*/bclk_dout_reg*}] \
-datapath_onlyThe constraint above can be re-written as follows to significantly improve the query runtime, especially for larger designs:
set_max_delay 15 -from [get_pins -of [get_cells -hier –filter
{NAME =~ *aclk_dpram_reg*/*}] -filter {REF_PIN_NAME == CLK}] \
-to [get_cells -hier bclk_dout_reg*] \
-datapath_only