The block-level constraints must comply with the following rules:
- Do not define clocks in the block-level constraints if they are expected to be
created at the top level of the design.
Instead they can be queried inside the block using the get_clocks -of_objects command. This command returns all the clocks that traverse a particular object in the design.
set blockClock [get_clocks -of_objects [get_ports clkIn]]
If a clock needs to be defined inside the block, it must be on an input/inout port that is driving an instantiated input/inout buffer, or on the output of a cell that creates/transforms a clock (except for MMCM/PLL or special buffers that are automatically handled by the timing tools).
- Input clock with input buffer
- Clock Divider
- GT recovered clock
- Specify input and output delay only if the port is directly connected to the
top-level port and the I/O buffer is instantiated inside the IP.
- Input data ports with input buffers
- Output data ports with output buffers
- Do not define timing exceptions between two clocks that are not bounded to the IP.
- Do not refer to clocks by name as the name may vary based on the top-level clock names or if the block is instantiated multiple times.
- Do not add placement constraints if the block can be instantiated multiple times in a same top-level design.