The relative grid system:
- Is also known as the standard grid.
- Is sufficient for most RPMs.
- Is used for homogeneous RPMs in which all cells in an RPM belong to the same
site type (such as slice, block RAM, and DSP).Note: Objects are positioned in relation to other objects in the same RPM set.
The relative grid is a standard rectangular grid in which each grid element is the same size. For example, the following Verilog code example results in an eight-slice-high column with an FD cell in each slice:
(* RLOC = "X0Y0" *) FD sr0 (.C(clk), .D(d[0]), .Q(y[0]));
(* RLOC = "X0Y1" *) FD sr1 (.C(clk), .D(d[1]), .Q(y[1]));
(* RLOC = "X0Y2" *) FD sr2 (.C(clk), .D(d[2]), .Q(y[2]));
(* RLOC = "X0Y3" *) FD sr3 (.C(clk), .D(d[3]), .Q(y[3]));
(* RLOC = "X0Y4" *) FD sr4 (.C(clk), .D(d[4]), .Q(y[4]));
(* RLOC = "X0Y5" *) FD sr5 (.C(clk), .D(d[5]), .Q(y[5]));
(* RLOC = "X0Y6" *) FD sr6 (.C(clk), .D(d[6]), .Q(y[6]));
(* RLOC = "X0Y7" *) FD sr7 (.C(clk), .D(d[7]), .Q(y[7]));