The following figure shows a path between two flip-flops that are enabled every two cycles. It is safe to define a Multicycle Path constraint on this path to indicate that the first edge of the destination clock is not active, and only the second edge of the destination clock will capture a new data.
The following constraint establishes a new setup relationship:
set_multicycle_path 2 -setup -from [get_pins data0_reg/C] -to [get_pins data1_reg/D]This link in the Vivado Design Suite User Guide: Design Analysis and Closure Techniques (UG906) describes how the hold relationships are derived from the setup relationships. When modifying the setup relationship, the hold relationships are also modified to follow the changes in the setup launch and capture edges.
In the same example as Figure 1, after moving the setup check to the second capture edge, the hold check is automatically moved to the first capture edge (that is, one clock period before the setup check).
The following figure shows how both the setup and hold relationships have changed when only the setup path multiplier has been defined with the Multicycle Path constraint.
Holding the data in the data0_reg for one cycle is not needed for this
path to be functional due to the clock enable. In this case, Xilinx
recommends changing the hold relationship back to the original, which is between the
same launch and capture edges. To do so, you must add a second Multicycle Path
constraint that modifies the hold check only:
set_multicycle_path 1 -hold -end -from [get_pins data0_reg/C] \
-to [get_pins data1_reg/D]The -end option is used with set_multicycle -hold
command because the edges of the capture clock must be moved backward.
-end option is optional. Moving the capture edges
backward result in the same hold relationship as moving the launch edges forward. To
simplify the expressions, the -end option has been removed from the
next two examples.The following figure shows the updated setup and hold relationships after applying both Multicycle Path constraints.
To summarize this example, the following constraints are necessary to properly define a
multicycle path of two (2) between data0_reg/C and
data1_reg/D:
set_multicycle_path 2 -setup -from [get_pins data0_reg/C] -to [get_pins data1_reg/D] set_multicycle_path 1 -hold -from [get_pins data0_reg/C] -to [get_pins data1_reg/D]For a multicycle with a setup multiplier of four (4), the constraints are:
set_multicycle_path 4 -setup -from [get_pins data0_reg/C] -to [get_pins data1_reg/D] set_multicycle_path 3 -hold -from [get_pins data0_reg/C] -to [get_pins data1_reg/D]