Two clocks are not expandable when the timing engine cannot determine their common period over 1000 cycles. In this case, the worst setup relationship over the 1000 cycles is used during timing analysis, but the timing engine cannot ensure this is the most pessimistic case.
This is typically the case between two clocks with an odd fractional period ratio. For
example, consider two clocks,
by two MMCMs that share the same primary clock:
clk0has a 5.125 ns period.
clk1has a 6.666 ns period.
Their rising clock edges do not realign within 1000 cycles. The timing engine uses a setup path requirement of 0.01 ns on the timing paths between the two clocks. Even if the two clocks have a known phase relationship at their clock tree root, their waveforms do not allow safe timing analysis between them.
As with asynchronous clocks, the slack computation appears normally, but the value cannot be trusted. For this reason, unexpandable clocks are often assimilated to asynchronous clocks. Both clock categories must be treated the same way for constraining and clock-domain crossing circuitry.