The following tables are printed in the Vivado log file during the floorplanning phase of
- Summary of Latency Increase due to Auto-Pipeline Insertion
- This table details the number of pipeline stages inserted for each group.
- Summary of Physical Synthesis Optimizations
- This table shows the total number of inserted pipeline registers and the number of auto-pipeline groups optimized (Optimized Cells/Nets).
The following figure shows an example of the Summary of Latency Increase Due to Auto-Pipeline Insertion table.
The following figure shows an example of the Summary of Physical Synthesis Optimizations table.
The inserted pipeline registers can be retrieved based on their names as follows:
<origCellName>_psap and <origCellName>_psap_<N>
The following figure shows the path from SLR2 to SLR0 where nine
pipeline stages were automatically inserted during
The following figure shows the same example in the Device view.