EDIF netlist design sources are read into memory through use of the
read_edif command. Non-Project Mode also supports an RTL design
flow, which allows you to read source files and run synthesis before implementation.
read_checkpoint command to add synthesized design checkpoint
files as sources.
read_* Tcl commands are designed for use with Non-Project Mode. The
read_* Tcl commands allow the Vivado tools to
read a file on the disk and build the in-memory design without copying the file or
creating a dependency on the file.
This approach makes Non-Project Mode highly flexible with regard to design.