The AI Engine is an array of VLIW SIMD high-performance processors that cater to solutions with high compute or complex DSP intensive applications, for example, 5G Wireless or Machine Learning algorithms. The AI Engine is available in all AI core series ACAP devices. AI Engine based designs can be generated using the Vitis™ integrated design environment (IDE). For more information, see Versal ACAP AI Engine Programming Environment User Guide (UG1076). During the compilation of the AI Engine design using Vitis, a Vivado® Design Suite compatible project and design checkpoint (post route stage) is created by default. This generated .dcp file can be opened using Vivado and used for power estimation. report_power also reports AI Engine parameters, such as cores and tiles used, vector type and load, memory read and write rates as per the design. The maximum AI Engine frequency varies according to the device speed grade. The .xpe file generated using Vitis software platform can also be imported into the XPE tool. Also, there is a method to generate .xpe file for simulation flow from the Vitis software platform. For more information about XPE import feature, see Xilinx Power Estimator User Guide for Versal ACAP (UG1275).
Figure 1. AI Engine Report Power