List of Supported Devices - 2022.1 English

Vivado Design Suite User Guide: Dynamic Function eXchange (UG909)

Document ID
UG909
Release Date
2022-06-07
Version
2022.1 English
Table 1. List of Supported Devices in the Current Release
Device Variants*
Artix®-7
xc7a75t A, L
xc7a100t A, L, Q
xc7a200t L, Q
Kintex®-7
xc7k70t L
xc7k160t A, L
xc7k325t L, Q, QL
xc7k355t L
xc7k410t L, Q, QL
xc7k420t L
xc7k480t L
Virtex®-7
xc7v585t Q
xc7v2000t
xc7vx330t Q
xc7vx415t
xc7vx485t Q
xc7vx550t
xc7vx690t Q
xc7vx980t Q
xc7vx1140t
xc7vh580t
xc7vh870t
Zynq®-7000
xc7z007s
xc7z010 A
xc7z012s
xc7z014s
xc7z015
xc7z020 A, Q
xc7z030 A, Q
xc7z035
xc7z045 Q
xc7z100 Q
Kintex® UltraScale™
xcku025
xcku035
xcku040 Q
xcku060 Q, QR
xcku085
xcku095 Q
xcku115 Q
Virtex® UltraScale™
xcvu065
xcvu080
xcvu095
xcvu125
xcvu160
xcvu190
xcvu440
Artix UltraScale+™
xcau10p early access
xcau15p early access
xcau20p  
xcau25p  
Kintex® UltraScale+™
xcku3p
xcku5p Q
xcku9p
xcku11p
xcku13p
xcku15p Q
xcku19p
Virtex® UltraScale+™
xcvu3p Q
xcvu5p
xcvu7p Q
xcvu9p Q
xcvu11p Q
xcvu13p Q
xcvu19p
xcvu23p
xcvu27p
xcvu29p  
xcvu31p
xcvu33p
xcvu35p
xcvu37p Q
xcvu45p
xcvu47p
xcvu57p
Zynq® UltraScale+™ MPSoC
xczu1cg
xczu1eg  
xczu2cg  
xczu2eg A
xczu3cg
xczu3eg A, Q
xczu4cg
xczu4eg Q
xczu4ev A
xczu5cg
xczu5eg
xczu5ev A, Q
xczu6cg
xczu6eg
xczu7cg
xczu7eg  
xczu7ev A, Q
xczu9cg
xczu9eg Q
xczu11eg A, Q
xczu15eg Q
xczu17eg
xczu19eg Q
Zynq® UltraScale+™ RFSoC
xczu21dr Q
xczu25dr
xczu27dr
xczu28dr Q
xczu29dr Q
xczu39dr
xczu42dr  
xczu43dr
xczu46dr
xczu47dr
xczu48dr Q
xczu49dr Q
xczu58dr Q
xczu59dr Q
xczu65dr  
xczu67dr  
Versal® AI Core
xcvc1502
xcvc1702  
xcvc1802  
xcvc1902
Versal® AI Edge
xcve1752  
Versal Prime
xcvm1302  
xcvm1402  
xcvm1502  
xcvm1802 Q
Versal Premium
xcvp1202 early access
xcvp1502 early access
xcvp1702 early access
xcvp1802 early access
*Variants
  • L = Low Power
  • A = Automotive
  • Q = Defense Grade
  • QL = Defense Grade, Low Power
  • QR = Defense Grade, Radiation Tolerant
Note: All speed grades and temperature grades are supported.

Early access devices may be license gated, and for any early access and/or engineering silicon (ES) devices, device programming information is parameter gated.

If a device is early access or engineering silicon, the error message from Vivado will be the same. When running write_bitstream or write_device_image, the following error will be reported:
ERROR: [Vivado 12-4164] Dynamic Function eXchange partial bitstream generation is not supported for part <device>.

Contact Xilinx® for information regarding access to pre-production device support.