CLOCK_ROOT - 2022.1 English

Vivado Design Suite Properties Reference Guide

Document ID
UG912
Release Date
2022-06-08
Version
2022.1 English

CLOCK_ROOT

 

IMPORTANT:   The CLOCK_ROOT property has changed from a user-definable property to a read-only property. The user-definable property has been changed to USER_CLOCK_ROOT, which should be used instead.

The CLOCK_ROOT property is a read-only property reflecting the current resource assignment of the driver, or root, of the global clock net in the physical design. The CLOCK_ROOT reflects the clock root assigned by the Vivado placer. The place and route tools will automatically assign the clock root to achieve the best timing for the design.

The CLOCK_ROOT value should match the user-defined USER_CLOCK_ROOT property if it is defined. The USER_CLOCK_ROOT property lets you manually assign the clock root.

 

TIP:   If the Vivado router is run with the Explore directive, it can add additional clock roots to a net in order to improve the quality of the results.

Architecture Support

UltraScale and UltraScale+ architectures.

Applicable Objects

Global clock net (get_nets) directly connected to the output of a global clock buffer.

Value

<clock_region | pblock_name>: Specifies the name of a clock region on the target part, or a defined Pblock in the current design.

<object>: Specifies one or more clock nets, or net segments.

Syntax

Not applicable

Affected Steps

Placement

Routing

See Also

CLOCK_BUFFER_TYPE, page 173

CLOCK_REGION, page 183 

USER_CLOCK_ROOT, page 403