The Hardware Manager is a feature of the Vivado Design Suite that lets you connect to a device programmer or debug board, and exercise the programmed hardware device. The Hardware Manager lets you exercise debug logic on devices, accessing signals to set or retrieve current values. The many debug cores and objects of the Vivado hardware manager are shown in Figure 1-3.
Debug cores can be instantiated into an RTL design from the Xilinx IP catalog, or in the case of the ILA or VIO debug cores, can be inserted into the synthesized netlist using the netlist-based debug flow. Refer to Vivado Design Suite User Guide: Programming and Debugging (UG908) [Ref 23] for more information.
As seen in the figure above, the Vivado hardware manager objects include: