Step 6: Implementing the Design and Generating the Bitstream - 2022.1 English

Vivado Design Suite Tutorial: Programming and Debugging (UG936)

Document ID
UG936
Release Date
2022-05-20
Version
2022.1 English
  1. In the Flow Navigator, under the Program and Debug drop-down list, click Generate Bitstream.
  2. In the Save Project dialog box, click Save.
  3. When the Bitstream generation finishes, the Bitstream Generation Completed dialog box pops up and Open Implemented Design is selected by default. Click OK.
  4. If you get a dialog box asking to close the synthesized design before opening the implemented design, click Yes.
  5. Proceed to Using the Vivado Logic Analyzer to Debug Hardware to complete the rest of this lab.