# Defining Power and Thermal Constraints - 2022.1 English

## UltraFast Design Methodology Guide for Xilinx FPGAs and SoCs (UG949)

Document ID
UG949
Release Date
2022-06-08
Version
2022.1 English

When developing your design in the Vivado tools or Vitis environment, you must ensure that your design is within the constraints of your power delivery and thermal solution, which is typically based on early power estimation as determined by Xilinx Power Estimator (XPE). It is extremely important to ensure your design is properly constrained, because changes to your power delivery and thermal solution can be costly.

At a minimum, Xilinx recommends applying the total power budget, maximum process, and worst-case junction temperature to create a worst-case power analysis, using the following XDC constraints:

``````set_operating_conditions -design_power_budget <Power in Watts>
set_operating_conditions -process maximum
set_operating_conditions -junction_temp <Max Tj based on Temp Grade>``````
Power Tip: For a worst-case power estimation and until the Theta Ja (ΘJa) of the thermal solution is known, Xilinx recommends setting the Tj to the maximum allowed for the targeted temperature range. Theta Ja can be calculated as follows based on the thermal simulation result: `ΘJa = (Tj – Ta)/ Pd`. Units are Celsius per watt (°C/W).

The most accurate power estimation can be achieved after the Theta Ja of the thermal design is known. You can apply the Theta Ja and the maximum supported ambient temperature (Ta) of the application to `report_power` using the following constraints to replace the junction temperature setting. Using these constraints allows `report_power` to estimate the junction temperature more accurately and therefore, give a more accurate static power estimation.

``````set_operating_conditions -design_power_budget <Power in Watts>
set_operating_conditions -process maximum
set_operating_conditions -ambient_temp <Max Supported by Application>
set_operating_conditions -thetaja <Increase in Tj for every W dissipated C/W>``````

In addition, you can specify the power delivery design using XDC constraints. Using this approach allows `report_power` to report the margin on the total power, check the power estimation on the power rails, and report the margin based on the specified estimation and power rail consolidation. For more information on these constraints, see the Vivado Design Suite User Guide: Power Analysis and Optimization (UG907).

``````create_power_rail <power rail name> -power_sources {supply1, supply2 ,..}
add_to_power_rail <power rail name> -power_sources {supply1, supply2, ..}
set_operating_conditions -supply_current_budget {<supply rail name> <current budget in Amp>} -voltage {<supply rail name> <voltage>}
``````
Power Tip: Ensure the text power report is used for the most detailed power rail constraints reporting.