Impact on Implementation - 2022.1 English

UltraFast Design Methodology Guide for Xilinx FPGAs and SoCs (UG949)

Document ID
UG949
Release Date
2022-06-08
Version
2022.1 English

The set_max_delay constraint replaces the setup path requirement and influences the entire implementation flow. The set_min_delay constraint replaces the hold path requirement and only affects the router behavior whenever it introduces the need to fix hold.