KEEP and DONT_TOUCH - 2022.1 English

UltraFast Design Methodology Guide for Xilinx FPGAs and SoCs (UG949)

Document ID
UG949
Release Date
2022-06-08
Version
2022.1 English

KEEP and DONT_TOUCH are valuable attributes for debugging a design. They direct the tool to not optimize the objects on which they are placed.

  • KEEP is used by the synthesis tool and is not passed along as a property in the netlist. KEEP can be used to retain a specific signal, for example, to turn off specific optimizations on the signal during synthesis.
  • DONT_TOUCH is used by the synthesis tool and then passed along to the place and route tools so the object is never optimized.

Take care when using these attributes:

  • A KEEP attribute on a register that receives RAM output prevents that register from being merged into the RAM, thereby preventing a block RAM from being inferred.
  • Do not use these attributes on a level of hierarchy that is driving a 3-state output or bidirectional signal in the level above. If the driving signal and the 3-state condition are in this level of hierarchy, the IOBUF is not inferred, because the tool must change the hierarchy to create the IOBUF.
  • Attributes that disable optimization often result in larger, higher power-consuming circuits. Xilinx recommends using these controls sparingly and removing them when no longer needed.

Also, be aware that there is a difference between putting DONT_TOUCH on a signal or on a level of hierarchy:

  • If the attribute is placed on a signal, that signal is kept.
  • If the attribute is placed on a level of hierarchy, the tool does not touch the boundaries of that hierarchy, and no constant propagation occurs through the hierarchy. However, optimizations inside that level of hierarchy are retained.