Planning IP Requirements - 2022.1 English

UltraFast Design Methodology Guide for Xilinx FPGAs and SoCs (UG949)

Document ID
UG949
Release Date
2022-06-08
Version
2022.1 English

Planning IP requirements is one of the most important stages of any new project:

  • Evaluate the IP options available from Xilinx or third-party partners against required functionality and other design goals. For example:
    • Is custom logic more desirable compared to an available IP core?
    • Does it make sense to package a custom design for reuse in multiple projects in an industry standard format?
  • Consider the interfaces that are required such as, memory, network, and peripherals.
Important: To ensure that the tools process the IP-specific constraints properly, add the .xci or .xcix IP source files to the project. Do not use the IP-generated output DCP files as project sources when working with IP.