Worst Case Power Analysis - 2022.1 English

UltraFast Design Methodology Guide for Xilinx FPGAs and SoCs (UG949)

Document ID
UG949
Release Date
2022-06-08
Version
2022.1 English

Xilinx recommends designing the board for worst-case power. For details, see this link in the Vivado Design Suite User Guide: Power Analysis and Optimization (UG907).